PacoBlaze is a from-scratch synthesizable & behavioral Verilog clone of Ken Chapman's popular PicoBlaze embedded microcontroller. KCAsm is a lightweight PicoBlaze assembler written in Java.


While Ken's version aims toward the most efficient implementation in the Xilinx FPGA architecture, PacoBlaze tries to be as configurable as possible, maintaining source code compatibility and code cycle accuracy with the original PicoBlaze. It also follows Xilinx guidelines for behavioral synthesis constructs mapping to Xilinx FPGA blocks. As there are actually 3 versions of the PicoBlaze microcontroller, PacoBlaze provides all PicoBlaze versions in one single Verilog file set.

The nice thing™ of having a behavioral Verilog model of PicoBlaze is that it is easier to modify, trim or expand the core in order to adapt it for special purpose applications (e.g. PacoBlaze mods with a multiply or bit count instructions). It also makes pure behavioral Verilog simulations possible; something really neat that has allowed many of its users to reach Nirvana. ;o)


[2007-05-25] PacoBlaze 2.2 posted. Bug corrections on stack and interrupt. Reformatted one-hot encoding macros.

[2006-03-20] PacoBlaze 2.1 (beta-1) out. First attempt to add a wide ALU that implements an 8x8 multiplier and 16-bit add/sub instructions.

[2006-03-14] PacoBlaze 2.1 (beta) released. Cleaned macro usage inside modules. Flattened operation decoding (no more suboperations). Started adding some comparison testbenches. Refactored address stack module and program counter control.

[2006-02-13] PacoBlaze 2.0 (beta) released. Changed module hierarchy and names to ease implementation. Corrected a bug regarding the port output operation and a bug in the ALU shift_bit signal. A minor rewrite is ongoing to fix an interrupt bug. The corrected version will be posted soon.

[2004-10-24] Update: PacoBlaze 1.3 (beta) is out. KCAsm is now an universal compiler for all PicoBlaze versions 1, 2 and 3. Parameters are selected using Java properties. KCAsm *must* be compiled with a Java 5.0 compatible compiler.

For example, the command line to assembly the KCPSM3-psm file my_assembler_file.psm and create the my_module_name.v 18-bit BlockRAM Verilog configuration file together with the my_listing_file.rmh Verilog-readmemh listing file, is:

java -Dkcpsm=3 -Dbram=18 -Dmodule=my_module_name
  -jar KCAsm.jar my_assembler_file.psm my_listing_file.rmh

PacoBlaze has been written for Verilog-2001 compliance and is tested with Stephen Williams' Icarus Verilog compiler. Xilinx ISE WebPACK is used for testing core synthesis, including module inference. KCAsm is compiled and tested using Java J2SE JDK and utilizes the JavaCC Java compiler-compiler.

You may browse the testbench source code and the KCAsm Java documentation (may not be in synch with the latest version).



PacoBlaze and KCAsm are released under the modified BSD license for maximum flexibility and usefulness.


PacoBlaze and KCAsm are maintained by Pablo Bleyer Kocik [N@SPAM->@]. Please don't hesitate to email me with suggestions and bug reports.

Xilinx PicoBlaze Sun Java Copyright 2004-2007 Pablo Bleyer Kocik.
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